Lattice Semiconductor's CrossLink Video Interface Platform (VIP) bridge board contains an FPGA and a pair of IMX214 camera sensors.

Automotive systems like Advanced Driver Assistance Systems (ADAS) make extensive use of multiple types of sensors, including cameras. Vision systems are also a key element in many other embedded applications, from robotics to surveillance. Higher resolution cameras can produce higher quality images, but these also require more processing.

However, adding FPGAs to the mix can be pre-processed, thereby reducing bandwidth requirements and adding functionality at the source. For many applications, this could be a boon, from unmanned aircraft to augmented and virtual reality headsets.

1.Lattice Semiconductor's CrossLink Video Interface Platform (VIP) bridge board includes a CrossLink FPGA and a pair of IMX214 camera sensors.

In this regard, Lattice Semiconductor's CrossLink Video Interface Platform (VIP) bridge board (Figure 1) contains a CrossLink FPGA and a pair of IMX214 camera sensors. Two cameras can be used to implement stereo vision systems as well as other single and dual lens applications. It has four user-programmable LEDs and on-board SPI flash memory for the FPGA.

FPGAs can handle video chores such as multiplexing and demultiplexing, merging video streams, arbitration, separation and data conversion. It is also capable of providing custom data flow protocols.

2. The back of the VIP board has a pair of connectors that allow the carrier board to access processed video.

The VIP board provides a front-end FPGA processing system, typically connected to a host such as the ECP5 VIP processing board. The two upstream connectors on the back (Figure 2) allow access to the CrossLink FPGA I/O.

The CrossLink FPGA (Figure 3) is based on Lattice's 40nm low-power FPGA technology. It includes 5,936 look-up tables (LUTs), a pair of MIPI D-PHY interfaces, a hard-core I2C / SPI interface, and programmable and general-purpose I/O ports. The MIPI interface operates at speeds of up to 6 Gb / s. They support four data channels and have a clock channel. The system can handle video streams up to 4K UHD.

3. The CrossLink FPGA includes 5,936 LUTs, a pair of MIPI D-PHY interfaces, a hard-core I2C / SPI interface, and programmable and general-purpose I/O ports.

Lattice offers a number of IP modules for FPGAs, all of which are supported by Lattice Diamond development tools. Diamond licenses are free for non-SERDES devices. The FPGA can be programmed using the on-board header or through one of the upstream connectors. Each camera has its own I2C programming interface connected to the upstream connector. The on-board regulator supports 5,3.3 or 2.5 V power input.

I will be releasing some Lattice video kits in the near future, so stay tuned.

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